473
Instruction Execution Times and Number of Steps Section 10-5
will occur if the capacity of a user program for another PLC is converted for
a CJ-series PLC based on the assumption that 1 word is 1 step. Refer to
the information at the end of
10-5 Instruction Execution Times and Number
of Steps
for guidelines on converting program capacities from previous
OMRON PLCs.
2. Most instructions are supported in differentiated form (indicated with
↑, ↓,
@, and %). Specifying differentiation will increase the execution times by
the following amounts.
3. Use the following times as guidelines when instructions are not executed.
10-5-1 Sequence Input Instructions
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table
Symbol CJ1-H CJ1M CJ1
CPU6@H-R CPU6@HCPU4@HCPU@@ CPU4@
↑ or ↓ +0.24 µs+0.24 µs+0.32 µs+0.5 µs+0.45 µs
@ or % +0.24 µs+0.24 µs+0.32 µs+0.5 µs+0.33 µs
CJ1-H CJ1M CJ1
CPU6@H-R CPU6@HCPU4@HCPU@@ CPU4@
Approx. 0.1 µs Approx. 0.1 µs Approx. 0.2 µs Approx. 0.2 to
0.5 µs
Approx. 0.2 to
0.4 µs
Instruction Mnemonic Code Length
(steps)
(See
note.)
ON execution time (
µs) Conditions
CPU6@H-R CPU6@HCPU4@HCPU4@ CJ1M
excluding
CPU11/21
CJ1M
CPU11/21
LOAD LD --- 1 0.016 0.02 0.04 0.08 0.10 0.10 ---
!LD --- 2 +21.14 +21.14 +21.16 +21.16 +24.10 +28.07 Increase for imme-
diate refresh
LOAD NOT LD NOT --- 1 0.016 0.02 0.04 0.08 0.10 0.10 ---
!LD NOT --- 2 +21.14 +21.14 +21.16 +21.16 +24.10 +28.07 Increase for imme-
diate refresh
AND AND --- 1 0.016 0.02 0.04 0.08 0.10 0.10 ---
!AND --- 2 +21.14 +21.14 +21.16 +21.16 +24.10 +28.07 Increase for imme-
diate refresh
AND NOT AND NOT --- 1 0.016 0.02 0.04 0.08 0.10 0.10 ---
!AND NOT --- 2 +21.14 +21.14 +21.16 +21.16 +24.10 +28.07 Increase for imme-
diate refresh
OR OR --- 1 0.016 0.02 0.04 0.08 0.10 0.10 ---
!OR --- 2 +21.14 +21.14 +21.16 +21.16 +24.10 +28.07 Increase for imme-
diate refresh
OR NOT OR NOT --- 1 0.016 0.02 0.04 0.08 0.10 0.10 ---
!OR NOT --- 2 +21.14 +21.14 +21.16 +21.16 +24.10 +28.07 Increase for imme-
diate refresh
AND LOAD AND LD --- 1 0.016 0.02 0.04 0.08 0.05 0.05 ---
OR LOAD OR LD --- 1 0.016 0.02 0.04 0.08 0.05 0.05 ---
NOT NOT 520 1 0.016 0.02 0.04 0.08 0.05 0.05 ---
CONDITION ON UP 521 3 0.24 0.3 0.42 0.54 0.50 0.50 ---
CONDITION OFF DOWN 522 4 0.24 0.3 0.42 0.54 0.50 0.50 ---
LOAD BIT TEST LD TST 350 4 0.11 0.14 0.24 0.37 0.35 0.35 ---
LOAD BIT TEST
NOT
LD TSTN 351 4 0.11 0.14 0.24 0.37 0.35 0.35 ---
AND BIT TEST
NOT
AND TSTN 351 4 0.11 0.14 0.24 0.37 0.35 0.35 ---
OR BIT TEST OR TST 350 4 0.11 0.14 0.24 0.37 0.35 0.35 ---
OR BIT TEST NOT OR TSTN 351 4 0.11 0.14 0.24 0.37 0.35 0.35 ---
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