RL78/G13 APPENDIX A REVISION HISTORY
R01UH0146EJ0100 Rev.1.00 1065
Sep 22, 2011
(4/7)
Page Description Classification
CHAPTER 9 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
p. 463
Change of note and addition of remark to Figure 9-1. Block Diagram of Clock Output/Buzzer
Output Controller
(a), (c)
p. 465
Change of Figure 9-2. Format of Clock Output Select Register n (CKSn) (c)
p. 466
Change of 9.3 (2) Port mode register 1, 3, 5, 14 (PM1, PM3, PM5, PM14) (c)
CHAPTER 10 WATCHDOG TIMER
p. 472
Change of caution 4 and deletion of caution 5 in 10.4.1 Controlling operation of watchdog timer
Deletion of caution of Table 10-3. Setting of Overflow Time of Watchdog Timer
(c)
p. 473, 474
Deletion of caution 1 and change of remark in Table 10-4. Setting Window Open Period of
Watchdog Timer
(c)
CHAPTER 11 A/D CONVERTER
p. 475
Change of description in 11.1 Function of A/D Converter (c)
p. 476
Change of Figure 11-1. Block Diagram of A/D Converter (c)
p. 477, 478
Change of description in 11.2 Configuration of A/D Converter (b), (c)
p. 479
Change of 11.3 Registers Used in A/D Converter (c)
p. 482
Addition of note to Table 11-1. Settings of ADCS and ADCE Bits
Change of Table 11-2. Setting and Clearing Conditions for ADCS Bit
(c)
p. 486, 487,
490, 491
Change of Table 11-3. A/D Conversion Time Selection (c)
p. 493
Change of Figure 11-7. Format of A/D Converter Mode Register 2 (ADM2) (a), (c)
p. 494
Change of Figure 11-8. ADRCK Bit Interrupt Signal Generation Range (a)
p. 496, 497
Change of Figure 11-11. Format of Analog Input Channel Specification Register (ADS) (c)
p. 499
Change of Figure 11-14. Format of A/D Test Register (ADTES) (c)
p. 500
Change of description in 11.3 (11) A/D port configuration register (ADPC) (c)
p. 501
Change of 11.3 (12) Port mode control registers 0, 3, 10, 11, 12, 14 (PMC0, PMC3, PMC10,
PMC11, PMC12, PMC14)
(c)
p. 502, 503
Change of 11.3 (13) Port mode register 0, 2, 3, 10, 11, 12, 14, 15 (PM0, PM2, PM3, PM10,
PM11, PM12, PM14, PM15)
(c)
p. 507 to 518
Change from “power down status” to “stop status” in 11.6 A/D Converter Operation Modes (c)
p. 523
Change of 11.7.4 Setup when using temperature sensor (example for software trigger mode
and one-shot conversion mode)
(c)
p. 526
Addition of description to 11.8 (1) If an interrupt is generated after A/D conversion ends (c)
p. 530
Change of 11.10 (2) Input range of ANI0 to ANI14 and ANI16 to ANI26 pins (b)
p. 533
Change of Table 11-6. Resistance and Capacitance Values of Equivalent Circuit (Reference
Values)
(b)
Remark “Classification” in the above table classifies revisions as follows.
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
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