Systemsoftware
2-30 System- and communication configuring D7-SYS - SIMADYN D
Edition 03.2001
x
General Addresses
Cyclic tasks
Int. tasks
Stop
Clock cycle
Basic cycle (T0)
Create
Synchronizing
Basic sampling time :
∆
∆
Source :
Equiv. sample time :
Delay time :
∆
∆
L bus basic cycle
1.0
ms
ms
ms
1.0
keine
Transmit basic cycle:
OK
∆
∆
no
Exit
Help
Properties
∆
∆
Fig. 2-9 Dialog field, basic clock cycle in HWConfig
2.1.8.8 Configuring the interrupt task synchronization
The setting is made in the dialog window "Interrupt tasks" of the
HWConfig (refer to the Chapter "Significance and use of CPU
synchronization"). The synchronization is disabled as default, i. e. no
process interrupts are defined and a bus interrupt is not transmitted.
• The mouse is used to select one of the 8 possible interrupt tasks I1 -
I8.
• Select the required source of the defined process interrupt from a list,
e. g.
C bus interrupt or
CPU counter C1 or C2
• Enter an equivalent sampling time from 0.1 to 16 ms.
In the lower window section, select whether the selected CPU is to
function as the process interrupt source for the subrack. In this case, one
of the defined interrupt tasks I1 - I8 must be selected, and transmitted on
the L- and/or C bus. It can be decided as to whether the interrupt task is
sent at the start or at the end of the interrupt task processing.
Setting the
interrupt task
synchronization
CPU as interrupt
source for the
subrack
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