Applications
A-7
High Speed Counter Encoder Module User Manual
A.4 Prescale Counting Applications
The
16-bit prescale 16-bit counting mode cascades the output of one 16-bit
counter
, in Divide-by-N mode, into the same channel’
s other 16-bit counter
.
This counting mode functions the same as 32-bit cascade counting described
in Section A.3, Cascade Counting Operations; the difference is in the
LSW
ord count fomat and Preset value.
Counter 2 or 5 Configuration (MSW
ord):
•
Channel Count Format:
Up Counting.
•
Count Range:
Unsigned Integer
, 0 to 65535.
•
Counter Preset V
alue: 0.
•
Counter Mode:
Divide-by-N.
•
Internal Gate:
Reset Flags, WY19.03, .07.
•
External Gate:
Not allowed for proper operation.
Counter 3 or 6 Configuration (LSW
ord):
•
Channel Count Format:
Down Counting.
•
Counter Preset V
alue:
Unsigned Integer
, 0 to 65535
prescale value to divide clock pulses
•
Counter Mode:
Divide-by-N.
•
Internal Gate:
Reset Flags, WY19.04, .08.
•
External Gate:
Not allowed for proper operation.
By using the repetitive nature of Divide-by-N mode, the output of Counter 3
or 6 pulses the rollover signal at the count of 1. The rollover signal is
defined in Chapter 1. The output of each 16-bit counter is the OR’d output
[8, 7, 4, or 3] and the corresponding Force Output On bit (WY19.09, .10, .13,
or .14). If the corresponding Force Output On bit is 1, the output is forced
On and overrides the counter output.
On the first valid clock, the count values are that Counter 2 equals 0 and
Counter 3 equals the value of Preset 4. The clock decrements Counter 3
until the count reaches a count of 0:1. At this time the rollover output turns
On, and remains On for one clock incrementing Counter 2. The preset value
is loaded into Counter 3 and counting continues. Counter 3’
s output pulses
every preset 4 number of clocks. Setting the Clock Reset flags, WY19.03, .04
pauses the 16-bit counters and reloads the preset values when the flags are
cleared.
16-Bit Pr
escale
16-Bit Counting
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