EasyManuals Logo

Sun Microsystems SPARCengine Ultra AXi User Manual

Sun Microsystems SPARCengine Ultra AXi
174 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #139 background imageLoading...
Page #139 background image
Appendix D OpenBoot Firmware D-5
FIGURE D-3 Ultra AXi NVRAM Content Layout
D.4 Power on Self-Test (POST)
POST tests onboard system resources that are necessary for OBP to execute and boot
Solaris. For Post to run, three hardware requirements must be met:
The instruction fetch path between the CPU and the OBP PROM must be
operating.
The CPU must have a functioning integer unit to allow proper code execution.
The serial port A (TTYA) must function to allow POST messages to be displayed.
Post will stop at the first failure and hand over the execution to OBP. In the case of
POST failure, OBP will not go through the Auto-Boot process and drops to the ok
prompt. To check the POST failure, use show-post-results command at the ok
prompt. The system will display the failure message.
OBP configuration
variables
Space for
NVRAMRC
ID PROM
(has Ethernet address)
Not modified
May be modified
using OBP
Optional OBP
executable code
and data space
Manufacturing
information
32
bytes
32
bytes
100
bytes
8028
bytes
8 KB

Table of Contents

Other manuals for Sun Microsystems SPARCengine Ultra AXi

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Sun Microsystems SPARCengine Ultra AXi and is the answer not in the manual?

Sun Microsystems SPARCengine Ultra AXi Specifications

General IconGeneral
BrandSun Microsystems
ModelSPARCengine Ultra AXi
CategoryMotherboard
LanguageEnglish