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MSP-TS430RHL20_V1.0.SchDoc
Sheet Title:
Size:
Mod. Date:
File:
Sheet: of
B
http://www.ti.com
Contact:
http://www.ti.com/support
MSP-TS430RHL20Project Title:
Designed for:Public Release
Assembly Variant:[No Variations]
© Texas Instruments 2017
Drawn By:
Engineer:
M. Pridgen
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, willbe suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your applicatio
Version control disabledSVN Rev:
Number:
Rev: 1.0
TID #: N/A
Orderable: EVM_orderable
1
2
3
J1
TSW-103-07-G-S
1
2
3
J2
TSW-103-07-G-S
1
2
3
JP9
TSW-103-07-G-S
1
2
3
JP10
TSW-103-07-G-S
1
2
3
JP5
TSW-103-07-G-S
1
2
3
JP6
TSW-103-07-G-S
1
2
3
JP7
TSW-103-07-G-S
1
2
3
JP8
TSW-103-07-G-S
ext
int
VCC
JTAG ->
SBW ->
TEST/SBWTCK1
TEST/SBWTCK
GND
47k
R7
1100pF
C5
SW2
EVQ-11L05R
RST/SBWTDIO P1.7/TDO P1.6/TDI P1.5/TMS P1.4/TCK
DVSS
TMS
TDI
TDO/SBWTDIO
VCC
GND
GND
TEST/SBWTCK
BSL_RX
BSL_TX
RST/SBWTDIO
BSL_SCL
BSL_SDA
UART BSL Connection
I2C Pullups
BSLRX
BSLTX BSL_TX
BSL_RX
BSLSCL
BSLSDA BSL_SDA
BSL_SCL
DVCC
TP1
TP2
TP3
TP4
VCC Current
Measurement
4.7k
R16
4.7k
R17
DVCC
BSLSDA
BSLSCL
BSL_TX
BSL_RX
BSL_SDA
BSL_SCL
RST/NMI
TCK/SBWTCK
0
R21
0
R20
0
R19
1
2
3
4
12
34
56
78
910
1112
1314
JTAG
SBH11-PBPC-D07-ST-BK
1 2
3 4
SW3
1 2
3 4
SW4
1 2
3 4
SW5
0
R3
DNP
R4
Ext_PWR
I2C BSL Connection
VCC
1 2
3 4
5 6
7 8
9 10
BSL
AWHW-10G-0202-T
DVCC
1
2
JP1
TSW-102-07-G-S
If external supply voltage:
remove R3 and add R4 (0 ohm)
and the I2C BSL and the I2C pull-ups are disconnected
By default the UART BSL is connected
0.1µF
C6
DVCC
DVSS
DNP
R8
DNP
R9
DNP
C8
DNP
C9
DVSS
HFGND Connection by viaXIN_ext XIN
XOUTXOUT_ext
10µF
C7
1
2
JP11
TSW-102-07-G-S
1
2
JP12
TSW-102-07-G-S
DVSS
330
R1
Green
12
D1
P1.0
P2.3
SW1
EVQ-11L05R
DNP
R13
DVCC
P2.2
0
R10
GND
TP5
TP6
Blue
21
D2
200
R2
5
4
1
2
3
6
7
8
9
10
J3
5
4
1
2
3
6
7
8
9
10
J4
P1.1/UCB0CLK/ACLK/A1/VREF+/CAP1.1
P1.0/UCB0STE/A0/Veref+/CAP1.0
TEST/SBWTCK
RST/NMI/SBWTDIO
DVCC
DVSS
P2.1/UCA0RXD/XIN
P2.0/UCA0TXD/XOUT
P2.6/UCB0SOMI/UCB0SCL
P2.5/UCB0SIMO/UCB0SDA/A7 P2.4/TA1CLK/UCB0CLK/A6
P2.3/TA1.2/UCB0STE/A5
P2.2/TA1.1/SYNC/A4
P1.7/UCA0STE/TDO/CAP0.3
P1.6/UCA0CLK/TA0CLK/TDI/TCLK/CAP0.2
P1.5/UCA0RXD/UCA0SOMI/TA0.2/TMS/CAP0.1
P1.4/UCA0TXD/UCA0SIMO/TA0.1/TCK/CAP0.0
VREG
P1.3/UCB0SOMI/UCB0SCL/MCLK/A3/CAP1.3
P1.2/UCB0SIMO/UCB0SDA/SMCLK/A2/Veref-/CAP1.2
BSLTX
BSLRX
BSLSDA
BSLSCL
P1.4/TCK
P1.5/TMS
P1.6/TDI
P1.7/TDO
P1.0
P2.2
P2.3
1µF
C1
DVSS
VREG
XIN
XOUT
XIN_ext
XOUT_ext
DVSS
DVCC
TEST/SBWTCK
RST/SBWTDIO
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20
IC1
1 2
DNP
Q1
Figure B-12. MSP-TS430RHL20 Target Socket Module, Schematic
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