Manual VIPA CPU 21x Chapter 7 Deployment of the CPU 21xDP
HB103E - Rev. 05/45 7-19
The transmit and receive buffers are cleared when an error occurs.
These bits are reserved for future use.
Indicates validity of the parameter data. Parameter data is entered into the
master configuration tool.
Indicates the status of the activation of the response monitor in the leading
Profibus master. The slave will terminate communications when the
response monitoring time is exceeded.
Status indicator for master communications. A bad configuration or bad
parameters will terminate communications and the respective error is
indicated by means of this bit.
Displays the status of the configuration data. The length of the
configuration data and the number of parameter bytes is analyzed. The
configuration is only accepted as being correct if these are equal and if no
more than 31Byte of parameter data is transferred.
Status indicator of the configuration data that are received from the
Profibus master. You define the configuration by means of the master
configuration tool.
Indicates the status of the response monitor in the Profibus master. This
location contains an error when the response monitor has been activated
and the required response time has been exceeded in the slave.
This bit is set if the Profibus controller in the CPU 21xDP is defective. In
this case you should contact the VIPA Hotline.
Any transfer error on the Profibus will set this error.
Parameter
Clear Data
reserved
User Parameter
Response
monitoring
(active)
Profibus data
exchange status
Parameter
configuration
Configuration
Response
monitoring
(Watchdog)
Hardware
monitoring
DP data
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