IIcontinue
after
interruptll.
In
the
case
of
the IIcontinue
after
interrupt
ll
instructions,
certain
general
registers
contain
intermediate
results
or
control information
that
allows the instruction to
continue
properly.
6.
Instruction format:
a.
Indirect
addressing - If
bit
position 0
of
the
in-
struction format
contains
an asterisk (*),
the
instruction
can
use
either
indirect
or
direct
addressing. If
bit
position 0
of
the
instruction
format
contains
a
0,
the
instruction
is
of
the
immediate
operand
type,
which is
treated
as a
nonexistent
instruction
if
indirect
addressing is
attempted
(resulting in a trap to
location
X'40').
b.
Operation
code
- The
operation
code
field
(bit
positions
1-7)
of
the
instruction
is
shown in
hexa-
decimal
notation.
For
certain
I/O
instructions,
the
operation
code
field
is
extended
and
includes
bit
positions
15-17
of
the
instruction.
c.
R
field
- If the
register
address
field
(bit
posi-
tions
8-11)
of
the
instruction format
contains
the
character
11
RII,
the
instruction
can
specify
any
register
in the
current
block
of
general
registers
as an
operand
source, result
destination,
or
both;
otherwise,
the
function
of
this
field
is
determined
by
the
instruction.
d. X
field
-
If
the
index
register address
field
(bit
positions
12-14)
of
the instruction format
contains
the
character
IIXII,
the instruction
specifies
in-
dexing
with
anyone
of
registers 1 through 7 in
the
current
block
of
general
registers;
otherwise,
the function
of
this
field
is
determined
by
the
instruction.
e.
Reference address
field
-
Normally,
the address
field (bit
positions
15-31)
of
the instruction
for-
mat
is
used as the
reference
address
value
for
real,
real
extended,
and
virtual addresses (see
Chapter
2). This
reference
address field is also
used to oddress
I/o
systems (see
I/o
instructions
later
in this
chapter
and also
Chapter
4). For
im-
mediate
operand
instructions, this
field
is
aug-
mented with the
contents
of
the X
field,
as
illustrated,
to form a
20-bit
operand.
f.
Value
field
-
In
some
fixed-point
arithmetic
instructions,
bit
positions 12-31
of
the
instruc-
tion format
contain
the word
"value
ll
. The
field
is
treated
as a
20-bit
integer,
with
nega-
tive
integers
represented in two's complement
form.
g. Displacement
field
-
In
the
byte
string instructions
bit
positions 12-31
of
the instruction format
con-
tain
the
byte
"displacement".
In
the
execution
of
the
instruction, this field is used to modify the
source address
of
an
operand,
the
destination
ad-
dress
of
a result, or both.
48 Instruction Repertoire
h. Reserved fields
-In
any
format diagram
that
depicts
system inputs (i.
e.,
instruction,
data
word), a
shaded
area
represents a field
that
is
ignored by
the
bas i c processor
(i
.
e.
, the
content
of
the
shaded
field
has no
effect
on instruction
execution).
It
should
not
be used
or
must be coded with
O's
to
preclude
conflict
with possible future modifications.
In
any
format di agram
that
depi cts system outputs
(i.
e.,
general
register, memory word modified by
an instruction,
or
I/O
status word), a shaded
area
represents a
field
whose
content
is
indeterminate
and must
not
be used (i.
e.,
masked).
7.
The
description
ofthe
instruction
defines
the
operations
performed by
the
basic
processor in response
to
the
in-
struction
configuration
depi
cted
by the instruction
for-
mat
diagram.
Any instruction configuration
that
causes an
unpredictable
result
is
so
specified
in
the
description.
8. All programmable registers and storage
areas
that
can
be
affected
by
the
instruction
are
listed (symbolically)
after
the word
"Affected".
The
instruction address
portion
of
the
program status words
is
considered to be
affected
only
if
a branch condition can
occur
as a
re-
sult
of
the
instruction
execution,
since
the
instruction
address
is
incremented
by 1 as part
of
every
instruction
execution.
9. All trap conditions
that
may be invoked by the
execu-
tion
of
the instruction
are
listed
after
the word "Trap".
Trap locations
are
summarized in the section "Trap
System" in
Chapter
2.
10. The symbolic
notation
presents the instruction
opera-
tion as a series
of
generalized
symbolic statements.
The symbolic terms used in the
notation
are
defined
in
the
Appendix, "Glossary
of
Symbolic Termsll.
11. Condition Code settings
are
given
for
each
instruction
that
affects
the
condition
code.
A 0
or
a 1 under
any
of
columns 1, 2,
3,
or
4
indicates
that
the instruction
causes a
0
or
1 to
be
placed
in CC1; CC2; CC3 or
CC4,
respectively,
for
the
reasons
given.
Ifahyphen
(-)
appears
in columns 1, 2,
3,
or
4,
that
portion
of
the
condition
code
is
not
affected.
For
example,
the
fo
1I0wing
condition
code
settings
are
given
for a
com-
parison instruction:
2 3 4 Result of comparison
o 0 Equal.
o Register
operand
is
arithmetically
less
than
effecti
ve
operand.
o Register operand
is
or: thmeti ca!!y
greate
r
than
effective
operand.
The logical product
of
the two operands
is
nonzero.
o The logical product (AND)
of
the two
op-
erands is
zero.
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