Xilinx ZCU106

ZCU106 Board User Guide 137
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Appendix B: Master Constraints File Listing
set_propertyPACKAGE_PIN K3 [get_ports "FMC_HPC0_DP7_C2M_N"] ;
set_propertyPACKAGE_PIN K4 [get_ports "FMC_HPC0_DP7_C2M_P"] ;
set_propertyPACKAGE_PIN J1 [get_ports "FMC_HPC0_DP7_M2C_N"] ;
set_propertyPACKAGE_PIN J2 [get_ports "FMC_HPC0_DP7_M2C_P"] ;
set_propertyPACKAGE_PIN F16 [get_ports "FMC_HPC0_LA00_CC_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA00_CC_N"] ;
set_propertyPACKAGE_PIN F17 [get_ports "FMC_HPC0_LA00_CC_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA00_CC_P"] ;
set_propertyPACKAGE_PIN H17 [get_ports "FMC_HPC0_LA01_CC_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA01_CC_N"] ;
set_propertyPACKAGE_PIN H18 [get_ports "FMC_HPC0_LA01_CC_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA01_CC_P"] ;
set_propertyPACKAGE_PIN K20 [get_ports "FMC_HPC0_LA02_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA02_N"] ;
set_propertyPACKAGE_PIN L20 [get_ports "FMC_HPC0_LA02_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA02_P"] ;
set_propertyPACKAGE_PIN K18 [get_ports "FMC_HPC0_LA03_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA03_N"] ;
set_propertyPACKAGE_PIN K19 [get_ports "FMC_HPC0_LA03_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA03_P"] ;
set_propertyPACKAGE_PIN L16 [get_ports "FMC_HPC0_LA04_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA04_N"] ;
set_propertyPACKAGE_PIN L17 [get_ports "FMC_HPC0_LA04_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA04_P"] ;
set_propertyPACKAGE_PIN J17 [get_ports "FMC_HPC0_LA05_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA05_N"] ;
set_propertyPACKAGE_PIN K17 [get_ports "FMC_HPC0_LA05_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA05_P"] ;
set_propertyPACKAGE_PIN G19 [get_ports "FMC_HPC0_LA06_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA06_N"] ;
set_propertyPACKAGE_PIN H19 [get_ports "FMC_HPC0_LA06_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA06_P"] ;
set_propertyPACKAGE_PIN J15 [get_ports "FMC_HPC0_LA07_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA07_N"] ;
set_propertyPACKAGE_PIN J16 [get_ports "FMC_HPC0_LA07_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA07_P"] ;
set_propertyPACKAGE_PIN E17 [get_ports "FMC_HPC0_LA08_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA08_N"] ;
set_propertyPACKAGE_PIN E18 [get_ports "FMC_HPC0_LA08_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA08_P"] ;
set_propertyPACKAGE_PIN G16 [get_ports "FMC_HPC0_LA09_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA09_N"] ;
set_propertyPACKAGE_PIN H16 [get_ports "FMC_HPC0_LA09_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA09_P"] ;
set_propertyPACKAGE_PIN K15 [get_ports "FMC_HPC0_LA10_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA10_N"] ;
set_propertyPACKAGE_PIN L15 [get_ports "FMC_HPC0_LA10_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA10_P"] ;
set_propertyPACKAGE_PIN A12 [get_ports "FMC_HPC0_LA11_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA11_N"] ;
set_propertyPACKAGE_PIN A13 [get_ports "FMC_HPC0_LA11_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA11_P"] ;
set_propertyPACKAGE_PIN F18 [get_ports "FMC_HPC0_LA12_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA12_N"] ;
set_propertyPACKAGE_PIN G18 [get_ports "FMC_HPC0_LA12_P"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA12_P"] ;
set_propertyPACKAGE_PIN F15 [get_ports "FMC_HPC0_LA13_N"] ;
set_propertyIOSTANDARD LVDS [get_ports "FMC_HPC0_LA13_N"] ;
set_propertyPACKAGE_PIN G15 [get_ports "FMC_HPC0_LA13_P"] ;
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