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Xilinx ZCU106 User Manual

Xilinx ZCU106
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ZCU106 Board User Guide 58
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
CP2108 Channel 2 PL-Side UART Interface
The CP2108 channel 2 bank 64 PL-side UART interface circuit is shown in Figure 3-15. The
connections from XCZU7EV MPSoC U1 to CP2108 U40 via TSX0104E level shifter U52 are
listed in Table 3-16.
X-Ref Target - Figure 3-15
Figure 3-15: PL-Side USB UART Interface
Table 3-16: XCZU7EV U1 to CP2108 U40 Connections via L/S U52
XCZU7EV (U1)
Pin
Net Name
CP2108 U40
Pin Name Pin #
AH17 UART2_TXD_O_FPGA_RXD TX_2 16
AL17 UART2_RXD_I_FPGA_TXD RX_2 15
AM15 UART2_RTS_O_B RTS_2 14
AP17 UART2_RTS_I_B CTS_2 13
X19177-050117
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Xilinx ZCU106 Specifications

General IconGeneral
BrandXilinx
ModelZCU106
CategoryMotherboard
LanguageEnglish

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