Cisco ONS 15454 - Page 270

5-26
Cisco ONS 15454 Reference Manual, R7.0.1
OL-9217-01
Chapter 5 Ethernet Cards
5.11 5.11 CE-100T-8 Card
The CE-100T8 card also supports the link capacity adjustment scheme (LCAS), which allows hitless
dynamic adjustment of SONET link bandwidth. The CE-100T-8 card’s LCAS is hardware-based, but the
CE-100T-8 also supports SW-LCAS. This makes it compatible with the ONS 15454 SDH ML-Series
card, which supports only SW-LCAS and does not support the standard hardware-based LCAS.
SW-LCAS is supported when a circuit from the CE-100T-8 terminates on the ONS 15454 SDH
ML-Series card.
The circuit types supported are:
• HO-CCAT
• LO-VCAT with no HW-LCAS
• LO-VCAT with HW-LCAS
• STS-1-2v SW-LCAS with ML only.
Each 10/100 Ethernet port can be mapped to a SONET channel in increments of VT1.5 or STS-1
granularity, allowing efficient transport of Ethernet and IP over the SONET infrastructure.
Figure 5-10 shows the CE-100T-8 card faceplate and block diagram.
Figure 5-10 CE-100T-8 Faceplate and Block Diagram
The following paragraphs describe the general functions of the CE-100T-8 card and relate to the block
diagram.
In the ingress direction, (Ethernet-to-SONET), the PHY, which performs all of the physical layer
interface functions for 10/100 Mbps Ethernet, sends the frame to the network processor for queuing in
the respective packet buffer memory. The network processor performs packet processing, packet
CE100T
8
FAIL
ACT
CONSOLE
1
2
3
4
5
6
7
8
134366
Packet Buffer
3x0.5MB
Control Mem
1x2MB
ETS
#1
SDRAM
qMDM
FPGA
Packet
Processor/
Switch
Fabric
qMDM
FPGA
Octal
PHY
SMII
8
8x
10/100BaseT
RJ45
Part of qMDM FPGA
FCC3
SMII
MII
4 SMII
STS3
STS3
STS3
ETS
#2
SDRAM
SDRAM
STS3
SCC1
60x
Flash
8MB
SDRAM
128MB
CPLD
SDRAM
1
4 SMII
ETS
#3
4 SMII
STS12
Add_Bus
Drop_Bus
ETS
#4
3 SMII
BTC
CPU
nVRAM
B
a
c
k
p
l
a
n
e
Option