User Manual Chapter 4
GFK-1742F Jan 2020
Configuration 106
Each CTL bit shown in the previous table can be configured to one of the values in the
following table
Table 31: Allowed Values for CTL Bits Tab
IN9_B (Axis 2 +OT)
IN10_B (Axis 2 -OT)
Strobe2 Level (Axis1)
Strobe1 Level (Axis2)
%Q bit Offset 15
%Q bit Offset 24
FBSA* Write Bit 2
FBSA* Write Bit 3
* FBSA is an acronym for “Fast Backplane Status Access” (Service Request #46). See GFK-0467L
or later for details.
4.3.5 Output Bits
The Output bits configuration tab allows the user to configure the DSM314 faceplate digital
outputs for either Local Logic program control or PLC program control. Output Bit
parameters are described in Table 32. Refer to Chapter 14 for additional information
concerning Output bit configuration.
Table 32: Output Bits Tab
PLC Control (%Q bit Offset 24)
DSM Control (Digital Output1_1)
PLC Control (%Q bit Offset 25)
DSM Control (Digital Output3_1)
PLC Control (%Q bit Offset 40)
DSM Control (Digital Output1_2)
PLC Control (%Q bit Offset 41)
DSM Control (Digital Output3_2)
PLC Control (%Q bit Offset 56)
DSM Control (Digital Output1_3)
PLC Control (%Q bit Offset 57)
DSM Control (Digital Output3_3)
PLC Control (%Q bit Offset 72)
DSM Control (Digital Output1_4)
PLC Control (%Q bit Offset 73)
DSM Control (Digital Output3_4)