Emerson DSM314 - FBSA Function and CTL Bit Assignments; Faceplate Output Bit Configuration

User Manual Chapter 14
GFK-1742F Jan 2020
Local Logic Configuration 322
CTL Bits
Allowed Configuration Values
for Bit Source
Description
%Q bit Offset 40
Faceplate 24v Output Control Axis 2 (OUT1_B)
%Q bit Offset 41
Faceplate 5v Output Control Axis 2 (OUT3_B )
%Q bit Offset 56
Faceplate 24v Output Control Axis 3 (OUT1_C)
%Q bit Offset 57
Faceplate 5v Output Control Axis 3 (OUT3_C)
14.4 FBSA Function and CTL Bit Assignments
The backplane Fast Backplane Status Access (FBSA) function will write 4 bits to the DSM and
read 8 bits. The FBSA function is mapped as shown in the following table.
FBSA is a Series 90-30 only feature. For information on the FBSA service request, refer to the
Series 90-30/20/Micro PLC CPU Instruction Set Reference Manual, GFK-0467L (or later).
Table 73: FBSA Bit CTL Bit Assignments
FBSA Read
CTL01-CTL08
CTL01-CTL08 each have an individually configurable source that
includes Local Logic or any DSM faceplate input. The bits are
always readable as PLC %I bits and FBSA inputs.
FBSA Write
CTL01-CTL24
(Configurable)
FBSA Write Bits 1-4 can be configured as the source for any of the
bits CTL01-CTL24.
FBSA Write Bits 1-2 are the default source for CTL23-24.
14.5 Faceplate Output Bit Configuration
The programming environment, through Hardware configuration, allows you to configure
the DSM314 faceplate digital outputs for either Local Logic program control or host
controller program control. The DSM314 configuration screens contain a tab (Output Bits).
Selecting this tab results in a display similar to the one shown in Figure 144.
Figure 144: Output Bit Configuration