Emerson DSM314 - CTL01-CTL24 Bit Configuration Selections

User Manual Chapter 14
GFK-1742F Jan 2020
Local Logic Configuration 321
14.3 CTL01-CTL24 Bit Configuration Selections
Each of the bits CTL01-CTL24 are individually configurable. CTL17-CTL24 default to the %Q
digital output control bits for axis 1 - axis 4. The configuration choices are shown in the
following table.
Table 72: CTL Bit Configuration Selections
CTL Bits
Allowed Configuration Values
for Bit Source
Description
CTL01-CTL24
IN9_A
Overtravel (+) Axis 1
IN10_A
Overtravel (-) Axis 1
IN11_A
Home Switch Axis 1
IN9_B
Overtravel (+) Axis 2
IN10_B
Overtravel (-) Axis 2
IN11_B
Home Switch Axis 2
IN9_C
Faceplate 24v Input Axis 3
IN10_C
Faceplate 24v Input Axis 3
IN11_C
Home Switch Axis 3
IN9_D
Faceplate 24v Input Axis 4
IN10_D
Faceplate 24 v Input Axis 4
IN11_D
Faceplate 24 v Input Axis 4
Strobe1 Level Axis1
Input Strobe1 Level Axis 1
Strobe2 Level Axis1
Input Strobe 2 Level Axis 1
Strobe1 Level Axis2
Input Strobe 1 Level Axis 2
Strobe2 Level Axis2
Input Strobe 2 Level Axis2
Strobe1 Level Axis3
Input Strobe 1 Level Axis 3
Strobe2 Level Axis3
Input Strobe 2 Level Axis 3
IN5_D
Faceplate 5v Input Axis 4
IN6_D
Faceplate 5v Input Axis 4
Local Logic Write
CTL bit under Local Logic control
Local Logic Active Flag
Local Logic Program Active
SNAP Write Bit 1
Serial Non-Acknowledge Protocol (FBSA) Bit 1
SNAP Write Bit 2
Serial Non-Acknowledge Protocol (FBSA) Bit 2
SNAP Write Bit 3
Serial Non-Acknowledge Protocol (FBSA) Bit 3
SNAP Write Bit 4
Serial Non-Acknowledge Protocol (FBSA) Bit 4
%Q bit Offset 12
CTL09 Program Control
%Q bit Offset 13
CTL10 Program Control
%Q bit Offset 14
CTL11 Program Control
%Q bit Offset 15
CTL12 Program Control
%Q bit Offset 24
Faceplate 24v Output Control Axis 1 (OUT1_A)
%Q bit Offset 25
Faceplate 5v Output Control Axis 1 (OUT3_A)