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Emerson DSM314 - Page 154

Emerson DSM314
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User Manual Chapter 5
GFK-1742F Jan 2020
DSM314 to Host Controller Interface 143
switch if the Clear Error %Q bit is also maintained on. See Chapter 6, Non-
Programmed Motion, for more information on Jogging with the DSM314.
3.10 Jog Minus. When this command bit is ON, the axis moves in the negative direction
at the configured Jog Acceleration and Jog Velocity rates. Turning Jog Minus OFF
causes the axis to decelerate and stop. If Jog Minus is momentarily turned off, even
for one host controller sweep, the axis will decelerate to a stop then accelerate and
continue jogging. The axis will move as long as the Jog Minus command is
maintained and the configured Negative End Of Travel software limit or Negative
Overtravel switch is not encountered. The Overtravel switch inputs can be disabled
using the OT Limit configuration parameter. Jog Minus may be used to jog off of the
Positive Overtravel switch if the Clear Error %Q bit is also maintained on. See Chapter
6, “Non-Programmed Motion,” for more information on Jogging with the DSM314.
3.11 Reset Strobe 1, 2 Flag. The Strobe n Flag %I status bit flag informs the host controller
that a Strobe Input has captured an axis position that is now stored in the associated
Strobe n Position %AI status word. When the host controller acknowledges this data,
it may use the Reset Strobe n Flag %Q command bit to clear the Strobe n Flag %I
status bit flag. Once the Strobe n Flag %I bit is set, additional Strobe Inputs will not
cause new data to be captured. The flag must be cleared before another Strobe
Position will be captured. As long as the Reset Strobe n Flag %Q command bit is set,
the Strobe n Flag bit will be held in the cleared state. In this condition, the latest
Strobe Input position is reflected in the Strobe n Position status word, although the
flag cannot be used by the host controller to indicate when new data is present.
3.12 OUT1_A, B, C, D Output Control / Configurable CTL Bit Source. Each axis connector
has a 24-vdc solid state relay (SSR) output rated at 125 ma. The OUT1_A, OUT1_B,
OUT1_C and OUT1_D Output Control %Q bits can control the state of the associated
output, but only if the associated Output Bits configuration is set for host controller
Control. Refer to Chapter 4 for configuration information.
For each axis, the following connector terminals are assigned:
Faceplate
Connector Pin
Auxiliary TB
IC693ACC336 Terminal
Servo TB IC693ACC335
Terminal
OUT1 SSR (+)
terminal
18
18
18
OUT1 SSR (-)
terminal
36
36
16
These %Q bits are also available as sources for configurable CTL bits, independent
of the Output Bits configuration. Refer to Chapter 4 for information on configuring
the CTL01-CTL24 bit sources.

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