Freescale Semiconductor MC68332 - Page 14

MC68332
USER’S MANUAL
Figure Title Page
3-1 MCU Block Diagram ....................................................................................... 3-3
3-2 Pin Assignments for 132-Pin Package ........................................................... 3-4
3-3 Pin Assignments for 144-Pin Package ........................................................... 3-5
3-4 Internal Register Memory Map ..................................................................... 3-10
3-5 Overall Memory Map .................................................................................... 3-11
3-6 Separate Supervisor and User Space Map .................................................. 3-12
3-7 Supervisor Space (Separate Program/Data Space) Map ............................ 3-13
3-8 User Space (Separate Program/Data Space) Map ...................................... 3-14
4-1 System Integration Module Block Diagram .................................................... 4-2
4-2 System Configuration and Protection ............................................................. 4-3
4-3 Periodic Interrupt Timer and Software Watchdog Timer ................................ 4-7
4-4 System Clock Block Diagram ......................................................................... 4-9
4-5 System Clock Oscillator Circuit .................................................................... 4-10
4-6 System Clock Filter Networks ...................................................................... 4-11
4-7 MCU Basic System ...................................................................................... 4-17
4-8 Operand Byte Order ..................................................................................... 4-21
4-9 Word Read Cycle Flowchart ......................................................................... 4-25
4-10 Write Cycle Flowchart .................................................................................. 4-26
4-11 CPU Space Address Encoding .................................................................... 4-27
4-12 Breakpoint Operation Flowchart ................................................................... 4-30
4-13 LPSTOP Interrupt Mask Level ...................................................................... 4-31
4-14 Bus Arbitration Flowchart for Single Request ............................................... 4-36
4-15 Data Bus Mode Select Conditioning ............................................................. 4-40
4-16 Power-On Reset ........................................................................................... 4-45
4-17 Basic MCU System ...................................................................................... 4-50
4-18 Chip-Select Circuit Block Diagram ............................................................... 4-51
4-19 CPU Space Encoding for Interrupt Acknowledge ......................................... 4-56
5-1 CPU32 Block Diagram ................................................................................... 5-2
5-2 User Programming Model .............................................................................. 5-3
5-3 Supervisor Programming Model Supplement ................................................. 5-3
5-4 Data Organization in Data Registers .............................................................. 5-4
5-5 Address Organization in Address Registers ................................................... 5-5
5-6 Memory Operand Addressing ........................................................................ 5-7
5-7 Common in-Circuit Emulator Diagram .......................................................... 5-16
5-8 Bus State Analyzer Configuration ................................................................ 5-17
5-9 Debug Serial I/O Block Diagram .................................................................. 5-21
5-10 BDM Serial Data Word ................................................................................. 5-22
5-11 BDM Connector Pinout ................................................................................. 5-22
5-12 Loop Mode Instruction Sequence ................................................................. 5-23
6-1 QSM Block Diagram ....................................................................................... 6-1
6-2 QSPI Block Diagram ..................................................................................... 6-6
LIST OF ILLUSTRATIONS
Fr
ees
cale S
em
iconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...