Intel Arria 10 FPGA User Manual

6.10.1.3. RLDRAM 3
The RLDRAM 3 x 36 (reduced latency DRAM) controller is designed for use in
applications requiring high memory throughput, high clock rates and full
programmability.
Figure 39. RLDRAM 3 Block Diagram
6. Board Components
683526 | 2023.07.12
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Intel
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Arria
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10 FPGA Development Kit User Guide
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Intel Arria 10 FPGA Specifications

General

Brand	Intel
Model	Arria 10 FPGA
Category	Microcontrollers
Language	English