Intel Arria 10 FPGA User Manual

6.10.1.4. QDR-IV
QDR-IV x 36 SRAM devices enable you to maximize memory bandwidth with separate
read and write ports.
Figure 40. QDR-IV Block Diagram
V3P3_VTTVDDQ (1.2 - 1.8V)
VDD
VLDOIN
VIN
V3P3
VDD_V1P3
VDDQ_V1P2
REFOUT
TPS51200DRC
QDRIV_OUT_VREF
HILO CONNECTOR
A0-A24
ANIV
AP
PEn
CFGn
RESETn
RWA/Bn
LKB0/1n
LDA/Bn
CK_P
CK_N
QVLDA0
QVLDA1
QVLDB0
QVLDB1
DQA0-35
DQB0-35
A0-A24
ANIV
AP
PE_L
CFG_L
RESET_L
RWA/B_L
LKB0/1_L
LDA/B_L
CK
CK_L
QVLDA0
QVLDA1
QVLDB0
QVLDB1
DQA0-35
DQB0-35
QDR IV x 36
VDD
VREF
VDDQ
VDD_V1P3
QDRIV_ODT_VREF
VDDQ_V1P2
QDRIV_ODT_A0-A24
QDRIV_ODT_DQA0-35
QDRIV_ODT_DQB0-35
QDRIV_ODT_ANIV
QDRIV_ODT_CFG_L
QDRIV_ODT_RST_L
QDRIV_ODT_RWA/B_L
QDRIV_ODT_LKB0/1_L
QDRIV_ODT_LDA/B_L
QDRIV_ODT_CK
QDRIV_ODT_CK_L
QDRIV_ODT_QVLDA0
QDRIV_ODT_QVLDA1
QDRIV_ODT_QVLDB0
QDRIV_ODT_QVLDB1
QDRIV_ODT_ANIV
QDRIV_ODT_ANIV
6. Board Components
683526 | 2023.07.12
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Intel Arria 10 FPGA Specifications

General

Brand	Intel
Model	Arria 10 FPGA
Category	Microcontrollers
Language	English