Intel Arria 10 FPGA - Page 14

Table 6. SW6 DIP Switch Default Settings (Board Bottom)
Switch Board Label Function Default Position
1 CLK_SEL ON for 100 MHz on-board clock oscillator selection
OFF for SMA input clock selection
ON
2 CLK_EN
OFF for setting CLK_ENABLE signal high to the MAV V
OFF
3 Si516_FS ON for setting the SDI REFCLK frequency to 148.35 MHz
OFF for setting the SDI REFCLK frequency to 148.5 MHz
OFF
4 FACTORY ON to load factory image from flash
OFF to load user image #1 from flash
ON
5 RZQ_B2K ON for setting RZQ resistor of Bank 2K to 99.17 ohm
OFF for setting RZQ resistor of Bank 2K to 240 ohm
OFF
3. Development Board Setup
683526 | 2023.07.12
Intel
®
Arria
®
10 FPGA Development Kit User Guide
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