Intel Arria 10 FPGA User Manual

Receive bus Receive bus FPGA Pin Number I/O Standard Description
A30 PCIE_TX_CN3 AW41 High Speed
Differential I/O
Transmit bus
A36 PCIE_TX_CN4 AV43 High Speed
Differential I/O
Transmit bus
A40 PCIE_TX_CN5 AU41 High Speed
Differential I/O
Transmit bus
A44 PCIE_TX_CN6 AT43 High Speed
Differential I/O
Transmit bus
A48 PCIE_TX_CN7 AR41 High Speed
Differential I/O
Transmit bus
A16 PCIE_TX_CP0 BB44 High Speed
Differential I/O
Transmit bus
A21 PCIE_TX_CP1 BA42 High Speed
Differential I/O
Transmit bus
A25 PCIE_TX_CP2 AY44 High Speed
Differential I/O
Transmit bus
A29 PCIE_TX_CP3 AW42 High Speed
Differential I/O
Transmit bus
A35 PCIE_TX_CP4 AV44 High Speed
Differential I/O
Transmit bus
A39 PCIE_TX_CP5 AU42 High Speed
Differential I/O
Transmit bus
A43 PCIE_TX_CP6 AT44 High Speed
Differential I/O
Transmit bus
A47 PCIE_TX_CP7 AR42 High Speed
Differential I/O
Transmit bus
B11 PCIE_WAKEN_R AY29 1.8 V Wake signal
6. Board Components
683526 | 2023.07.12
Intel
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Arria
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10 FPGA Development Kit User Guide
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Intel Arria 10 FPGA Specifications

General

Brand	Intel
Model	Arria 10 FPGA
Category	Microcontrollers
Language	English