Status Tutorial
Status Registers
EDP Status Register
UNR Status Register
Standard Event Status Group
Questionable Status Groups
Operation Status Group
Frame Status Group
Status Byte Register
Error and Output Queues
Status Diagram
Status Registers
The status groups use up to four types of registers to track, qualify, flag, and enable status events.
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A Condition register continuously monitors the state of the instrument. The bits in the condition
register are updated in real time and the bits are not latched.
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A PTR/NTR register qualifies the signal that passes to the event register. When a PTR bit is set, sig-
nals with positive edge transition pass to the event register. When an NTR bit is set, signals with a
negative edge transition pass to the event register. When both bits are set, all signal pass.
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An Event register latches transitions that pass through the PTR and NTR registers. When an event
bit is set, it remains set until the Event register is read. Reading the Event register clears it.
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An Enable register defines which bits in the event register will be reported to the Status Byte
register. You can write to or read from an enable register.
EDP Status Register
The EDP (excessive dynamic protection) status register maps into the EDP bit of the Questionable
Status registers. It queries the EDP status. The following table describes the bit assignments.
Bit Bit Name Decimal Value Definition
0 OS 1 Channel is disabled by over-switching protection (freq > 50kHz).
1 OSC 2 Channel is disabled by oscillation protection.
2 PWM_SAT_HI 4 Channel is disabled by persistent PWM high saturation protection
3 PWM_SAT_LO 8 Channel is disabled by persistent PWM low saturation protection
4 PWM_SAT_EITHER 16 Channel is disabled by persistent PWM saturation protection
Keysight MP4300 Series Operating and Service Guide 147
5 SCPI Programming Reference
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