625
Auxiliary Area Appendix C
A530 --- Power Inter-
rupt Dis-
abled Area
Setting
Set to A5A5 hex to disable power
interrupts (except the Power OFF
Interrupt task) between DI(693) and
EI(694) instructions.
A5A5 hex:
Masking power
interruption
processing
enabled
Other: Mask-
ing power inter-
ruption
processing not
enabled.
Cleared Cleared Not supported by
CJ1@-CPU@@ CPU
Units.
A531
(See
note 1.)
A53100 High-speed
Counter 0
Reset Bit
When the reset method is set to
Phase-Z signal + Software reset, the
corresponding high-speed counter's
PV will be reset if the phase-Z signal
is received while this bit is ON.
When the reset method is set to Soft-
ware reset, the corresponding high-
speed counter's PV will be reset in
the cycle when this bit goes from
OFF to ON.
--- Retained Cleared ---
A53101 High-speed
Counter 1
Reset Bit
--- Retained Cleared ---
A53108 High-speed
Counter 0
Gate Bit
When a counter's Gate Bit is ON, the
counter's PV will not be changed
even if pulse inputs are received for
the counter.
When the bit is turned OFF again,
counting will restart and the high-
speed counter's PV will be refreshed.
When the reset method is set to
Phase-Z signal + Software reset, the
Gate Bit is disabled while the corre-
sponding Reset Bit (A53100 or
A53101) is ON.
--- Retained Cleared ---
A53109 High-speed
Counter 1
Gate Bit
--- Retained Cleared ---
A532
(See
note 1.)
Interrupt
Counter 0
Counter SV
Used for interrupt input 0 in counter
mode.
Sets the count value at which the
interrupt task will start. Interrupt task
140 will start when interrupt counter
0 has counted this number of pulses.
Retained when operation starts.
--- Retained Retained ---
A533
(See
note 1.)
Interrupt
Counter 1
Counter SV
Used for interrupt input 1 in counter
mode.
Sets the count value at which the
interrupt task will start. Interrupt task
141 will start when interrupt counter
1 has counted this number of pulses.
--- Retained Retained ---
A534
(See
note 1.)
Interrupt
Counter 2
Counter SV
Used for interrupt input 2 in counter
mode.
Sets the count value at which the
interrupt task will start. Interrupt task
142 will start when interrupt counter
2 has counted this number of pulses.
--- Retained Retained ---
A535
(See
note 1.)
Interrupt
Counter 3
Counter SV
Used for interrupt input 3 in counter
mode.
Sets the count value at which the
interrupt task will start. Interrupt task
143 will start when interrupt counter
3 has counted this number of pulses.
--- Retained Retained ---
A536
(See
note 1.)
Interrupt
Counter 0
Counter PV
These words contain the interrupt
counter PVs for interrupt inputs oper-
ating in counter mode.
In increment mode, the counter PV
starts incrementing from 0. When the
counter PV reaches the counter SV,
the PV is automatically reset to 0.
In decrement mode, the counter PV
starts decrementing from the counter
SV. When the counter PV reaches
the 0, the PV is automatically reset to
the SV.
Cleared when operation starts.
--- Cleared Cleared Refreshed when inter-
rupt is generated.
Refreshed when
INI(880) instruction is
executed.
A537
(See
note 1.)
Interrupt
Counter 1
Counter PV
---
A538
(See
note 1.)
Interrupt
Counter 2
Counter PV
---
A539
(See
note 1.)
Interrupt
Counter 3
Counter PV
---
Addresses Name Function Settings Status
after
mode
change
Status at
startup
Write timing/
Related Flags,
Settings
Word Bit
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