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CPM1/CPM1A Interrupt Functions Section 1-6
2. This is the program section from the interrupt subroutine:
Note 1. Define interrupt routines at the end of the main program with SBN(92) and
RET(93) instructions, just like regular subroutines.
2. When defining an interrupt routine, a “SBS UNDEFD” error will occur dur-
ing the program check operation, but the program will be executed normal-
ly.
1-6-2 Input Interrupts
The 10-pt CPU Units (CPM1-10CDR-@ and CPM1A-10CDR-@) have two
interrupt inputs (00003 and 00004).
The 20-, 30-, and 40-pt CPU Units (CPM1-20CDR-@, CPM1A-20CDR-@,
CPM1-30CDR-@(-V1), CPM1A-30CDR-@
and CPM1A-40CDR-@) have four
interrupt inputs (00003 to 00006).
There are two modes for input interrupts: input interrupt mode and counter
mode.
CPM1 PCs
SBN(92) 000
@CTBL(63)
000
000
DM 0000
25313
25313
LR
0000
10-pt CPU Units
(CPM1-10CDR-@)
20- and 30-pt CPU Units
(CPM1-20CDR-@and
CPM1-30CDR-@(-V1))
00003
00004
00005
00006
00003
00004
24VDC
NC