AddFEM
Technical Data
4-13
AddFEM
C79000–G8076–C900–03
Cycle Times of Memory Tests (Only 6DL3100–8AB/–8AC)
–Memory test of the RAM:
Check for ”stuck–at–zero” and ”stuck–
at–one” faults
–Check sum across the program code in the
RAM
–Check sum across the program code in the
FEPROM
Note:
The program code of the RAM is used in cy-
clic operation
24.5 seconds
1.2 seconds
2.5 seconds
PROFIBUS–DP Channel Changeover
Changeover gap when changing over bet-
ween the PROFIBUS DP channels
No changeover gap
Changeover Gaps at Module Redundancy (Only 6DL3100–8AB/–8AC)
Changeover gap at intact optical–fiber cable
redundancy coupling
–Digital outputs
–Analog outputs
Changeover gap at missing or faulty optical–fi-
ber cable redundancy coupling
2)
–Digital and analog outputs
0 – 100 µs
0 – 300 µs
1 Automation processor cycle
+ 1 PROFIBUS DP token
+ 1 AddFEM cycle
2)
When the optical–fiber cable redundancy coupling fails the master/reserve assignment is decided by
the automation processor. The current error weighting of the modules is decisive for the assignment.
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