AddFEM
Technical Data
4-21
AddFEM
C79000–G8076–C900–03
Information on the Input Telegram (continued):
Word
No.
Meaning
17–22 Counter inputs Z1 to Z3
The detected counter values are represented in IEEE 754 format, single–precision, (32 bits
– 4 bytes). Refer to the description below.
23 Area ID AI
Identifies the polarity of the analog inputs (0 = unipolar; 1 = bipolar). The individual bits are
set channel–specifically.
Bit 0 (least significant bit) corresponds to analog input 1. Bit 11 corresponds to analog input
12.
24 Low–Byte:
Area ID AO
Identifies the polarity of the analog outputs (0 = unipolar; 1 = bipolar). The individual bits are
set channel–specifically.
Bit 0 (least significant bit) corresponds to analog output 1. Bit 7 corresponds to analog out-
put 8.
High–Byte:
Start–up ID
The start–up ID is fixed to 0xA5.
25 Low–Byte:
Sign of life + active DP channel
Mirrored sign of life with ORed active DP channel
Bit 0 – 3: Sign of life
Bit 4 –6: Reserve
Bit 7 = DP_AKT
DP_AKT = 0 = DP channel A is active. DP_AKT = 1 = DP channel B is active.
High-Byte:
Error weighting (FG)
Current error weighting of the AddFEM
26 Low–Byte:
Channel error weighting (KFG)
I/O channel errors (analog/digital / output/input) have the same weighting.
High byte:
Bit 0 – 4, 6 Reserve Not used at present
Bit 5 RPM Run Passiv Master
Bit 7: MRS AddFEM is reserve = 0. AddFEM is master = 1.
27 –
58
32 words for additional dynamic FEF signals in case of 6DL3100–8AB.
In case of 6DL3100–8AC it depends of configured FEF
59 –
62
3 words reserve only in case of 6DL3100–8AB
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