3.
The
space
count
(SPD33-47)
is
decremented
by 1 and
the word
count
(SPD49-63) is incremented
by
1.
4.
The
condition
code
is
set
to
reflect
the
new status
of
the
space
count.
Affected:
(SPD), (TSA+1), CC Trap: Push-down
stack
limit
(SPD)15_31
+ 1 -
SPD
15
_
31
t
(R)
-
(SPD
15
_
31
)t
(SPD)33_47-
1
-
SPD
33
_
47
(SPD)
49-63
+ 1 -
SPD
49-63
Condi ti on
code
setti ngs:
2 3 4 Result
of
PSW
0
0 0 0
Space
count
is
greater
}
than
O.
0 0 0 Space
count
is now
O.
0 0 0
Word
count
= 2
15
_1
,
TW
=
1.
0 0 Space
count
=
0,
TS
= 1.
0
Space
count
=
0,
word
count
=
0,
TS
=
1.
0
Word
count
= 2
15
_1
,
space
count =
0,
TW
= 1, and
TS
=
1.
PLW
PULL
WORD
(Doubleword index alignment)
Instructi on
completed
Instruction
aborted
08
I R I x I 1 Reference address I
o 1 2 3
14
5
718
9
10
llL2
13
14'15h6
17
18
19120
21
22
231242526
2712829
JO
)
PULL
WORD loads register R with the word currently
at
the
top
of
the push-down
stack
defined by the
stack
pointer
doubleword
located
at
the
effective
doubleword address
of
PLW.
If
the
pull
operation
can be performed successfully,
the instruction
operates
as follows:
1. Register R
is
loaded with
the
contents
of
the
loca-
tion pointed to by the current
top-of-stack
address
(SPD
1
5_31)t.
2. The
current
top-of-stack
address is decremented by 1,
to
point
to the new
top-of-stack
location.
tFor real
extended
mode
of
addressing this is a
20-bit
field (12-31); for real and virtual addressing modes
it
is
a
17-bit
field (15-31).
98 Push-Down Instructions
(Non-Privileged)
3.
The space count (SPD33-47)
is
incremented by 1 and
the word
count
(SPD49-63) is
decremented
by
1.
4.
The condition code
is
set
to
reflect
the status
of
the
new word count.
Affected:
(SPD),
(R),
CC
Trap:
Push-down stack limit
(SPD)15_31-
R;
(SPD)15_31-
1
-
SPD
15
_
31
t
{SPD)33_47 + 1 -
SPD
33
_
4
i
(SPD)49_63-
1
-SPD
49-63
Condition
code
settings:
2 3 4 Result
of
PLW
0 0 0
0
Word
count
is
greater
than
O.
0 0 0 Word
count
is
now
O.
0
0
Word count = 0,
TW
= 1.
0 Space
count
=
0,
word
count
=
0,
TW
=
1.
0 0 0
15
Space
count
= 2
-1,
TS
= 1.
0 1
15
Space
count
= 2
-1,
word
count
=
0,
TS
= 1,
and
TW
=
1.
PSM
PUSH
MULTIPLE
(Doubleword
index
alignment)
)
Instruction
completed
Instruction
aborted
PUSH
MULTIPLE
stores the contents
of
a sequential
set
of
general
registers into the push-down stack defined
by
the
stack
pointer
doubleword
located
at
the
effective
double-
word address
of
PSM.
The
condition
code
must contain
a
count
of
the number
of
registers to be pushed into the
stack.
(An
initial
value
of 0000 for the condition
code
specifics
that ef!
16
genera! registers ere
to
be pushed
into the
stack.)
The registers
are
treated
as a
circular
set
(with register 0 following register 15) and
the
first register
to be pushed into the stack is register
R.
The
last register
to
be
pushed in to the stack is register R + CC
-1,
and the
contents of this register become the contents of the new
top-of-stack
location.
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