Xilinx MicroBlaze - Features of MicroBlaze; MicroBlaze Microprocessor Core; Memory and Peripherals; GPIO and Debugging Interfaces

MicroBlaze Processor Reference Guide 10
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 2: MicroBlaze Architecture
Lockstep support
option option option option option option
Configurable use of FPGA
primitives
option option option option option option
Low-latency interrupt mode
option option option option option option
Swap instructions
option option option option option option
Sleep mode and sleep instruction
Yes Yes Yes Yes Yes Yes
Relocatable base vectors
option option option option option option
ACE (M_ACE_DC) protocol for D-
Cache
option option option option option option
ACE (M_ACE_IC) protocol for I-
Cache
option option option option option option
Extended debug: performance
monitoring, program trace, non-
intrusive profiling
option option option option option
Reset mode: enter sleep or debug
halt at reset
option option option option option
Extended debug: external program
trace
option option option option
Extended data addressing
option option
Pipeline pause functionality
Yes Yes
Hibernate and suspend instructions
Yes Yes
Non-secure mode
Yes Yes
Bit field instructions
2
option
Parallel debug interface
option
MMU Physical Address Extension
option
1. Used for saving DSP48E primitives.
2. Bit field instructions are available when C_USE_BARREL = 1.
Table 2-1: Configurable Feature Overview by MicroBlaze Version (Cont’d)
Feature
MicroBlaze versions
v9.2 v9.3 v9.4 v9.5 v9.6 v10.0
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