Xilinx MicroBlaze - Register Usage Conventions

MicroBlaze Processor Reference Guide 187
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 4: MicroBlaze Application Binary Interface
Register Usage Conventions
The register usage convention for MicroBlaze is given in the following table.
Table 4-2: Register Usage Conventions
Register Type Enforcement Purpose
R0 Dedicated HW
Value 0
R1 Dedicated SW
Stack Pointer
R2 Dedicated SW
Read-only small data area anchor
R3-R4 Volatile SW
Return Values/Temporaries
R5-R10 Volatile SW
Passing parameters/Temporaries
R11-R12 Volatile SW
Temporaries
R13 Dedicated SW
Read-write small data area anchor
R14 Dedicated HW
Return address for Interrupt
R15 Dedicated SW
Return address for Sub-routine
R16 Dedicated HW
Return address for Trap (Debugger)
R17 Dedicated HW/SW
Return address for Exceptions
HW, if configured to support hardware exceptions, else SW
R18 Dedicated SW
Reserved for Assembler/Compiler Temporaries
R19 Non-volatile SW
Must be saved across function calls. Callee-save
R20 Dedicated
or
Non-volatile
SW
Reserved for storing a pointer to the global offset table (GOT)
in position independent code (PIC). Non-volatile in non-PIC
code. Must be saved across function calls. Callee-save.
R21-R31 Non-volatile SW
Must be saved across function calls. Callee-save.
RPC Special HW
Program counter
RMSR Special HW
Machine Status Register
REAR Special HW
Exception Address Register
RESR Special HW
Exception Status Register
RFSR Special HW
Floating-Point Status Register
RBTR Special HW
Branch Target Register
REDR Special HW
Exception Data Register
RPID Special HW
Process Identifier Register
RZPR Special HW
Zone Protection Register
RTLBLO Special HW
Translation Look-Aside Buffer Low Register
RTLBHI Special HW
Translation Look-Aside Buffer High Register
RTLBX Special HW
Translation Look-Aside Buffer Index Register
RTLBSX Special HW
Translation Look-Aside Buffer Search Index
RPVR0-12 Special HW
Processor Version Register 0 through 12
Send Feedback