MicroBlaze Processor Reference Guide 231
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
fcmp
Floating-Point Number Comparison
fcmp.un
rD, rA, rB
Unordered floating-point comparison
fcmp.lt
rD, rA, rB
Less-than floating-point comparison
fcmp.eq
rD, rA, rB
Equal floating-point comparison
fcmp.le
rD, rA, rB
Less-or-Equal floating-point comparison
fcmp.gt
rD, rA, rB
Greater-than floating-point comparison
fcmp.ne
rD, rA, rB
Not-Equal floating-point comparison
fcmp.ge
rD, rA, rB
Greater-or-Equal floating-point comparison
0 1 0 1 1 0 rD rA rB 0 1 0 0 OpSel 0 0 0 0
0 6 11 16 21 25 28
31
Description
The floating-point value in rB is compared with the floating-point value in rA and the comparison
result is placed into register rD. The OpSel field in the instruction code determines the type of
comparison performed.
Pseudocode
if isDnz(rA) or isDnz(rB) then
(rD)
← 0
FSR[DO] ← 1
ESR[EC] ← 00110
else
{read out behavior from Table 5-2}
Registers Altered
• rD, unless an FP exception is generated, in which case the register is unchanged
• ESR[EC], if an FP exception is generated
•FSR[IO,DO]
Latency
• 1 cycle with C_AREA_OPTIMIZED=0 or 2
• 3 cycles with
C_AREA_OPTIMIZED=1
Note
These instructions are only available when the MicroBlaze parameter C_USE_FPU is greater than 0.
Table 5-2 lists the floating-point comparison operations.
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