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Xilinx MicroBlaze
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MicroBlaze Processor Reference Guide 234
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
fint
Floating-Point Convert Float to Integer
fint
rD, rA
0 1 0 1 1 0 rD rA rB 0 1 1 0 0 0 0 0 0 0 0
0 6 11 16 21
31
Description
Converts the floating-point number in register rA to a signed integer and puts the result in register rD.
This is a 32-bit signed conversion that will produce a 32-bit integer result.
Pseudocode
if isDnz(rA) then
(rD)
0xFFC00000
FSR[DO] 1
ESR[EC] 00110
else if isNaN(rA) then
(rD)
0xFFC00000
FSR[IO] 1
ESR[EC]
00110
else if isInf(rA) or (rA) < -2
31
or (rA) > 2
31
- 1 then
(rD) 0xFFC00000
FSR[IO]
1
ESR[EC] 00110
else
(rD)
int ((rA))
Registers Altered
rD, unless an FP exception is generated, in which case the register is unchanged
ESR[EC], if an FP exception is generated
•FSR[IO,DO]
Latency
5 cycles with C_AREA_OPTIMIZED=0
7 cycles with
C_AREA_OPTIMIZED=1
2 cycles with
C_AREA_OPTIMIZED=2
Note
This instruction is only available when the MicroBlaze parameter C_USE_FPU is set to 2 (Extended).
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