Xilinx MicroBlaze - Page 282

MicroBlaze Processor Reference Guide 283
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
sext16
Sign Extend Halfword
sext16
rD, rA
1 0 0 1 0 0 rD rA 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1
0 6 11 16
31
Description
This instruction sign-extends a halfword (16 bits) into a word (32 bits). Bit 16 in rA will be copied into
bits 0-15 of rD. Bits 16-31 in rA will be copied into bits 16-31 of rD.
Pseudocode
(rD)[0:15] ← (rA)[16]
(rD)[16:31]
← (rA)[16:31]
Registers Altered
•rD
Latency
• 1 cycle
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