MicroBlaze Processor Reference Guide 293
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
swapb
Swap Bytes
swapb
rD, rA
1 0 0 1 0 0 rD rA 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0
0 6 11 16
31
Description
Swaps the contents of register rA treated as four bytes, and places the result in rD. This effectively
converts the byte sequence in the register between endianness formats, either from little-endian to
big-endian or vice versa.
Pseudocode
(rD)[24:31] ← (rA)[0:7]
(rD)[16:23]
← (rA)[8:15]
(rD)[8:15] ← (rA)[16:23]
(rD)[0:7] ← (rA)[24:31]
Registers Altered
•rD
Latency
• 1 cycle
Note
This instruction is only valid if MicroBlaze is configured to use reorder instructions
(C_USE_REORDER_INSTR = 1).
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