MicroBlaze Processor Reference Guide 294
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
swaph
Swap Halfwords
swaph
rD, rA
1 0 0 1 0 0 rD rA 0 0 0 0 0 0 0 1 1 1 1 0 0 0 1 0
0 6 11 16
31
Description
Swaps the contents of register rA treated as two halfwords, and places the result in rD. This effectively
converts the two halfwords in the register between endianness formats, either from little-endian to
big-endian or vice versa.
Pseudocode
(rD)[0:15] ← (rA)[16:31]
(rD)[16:31]
← (rA)[0:15]
Registers Altered
•rD
Latency
• 1 cycle
Note
This instruction is only valid if MicroBlaze is configured to use reorder instructions
(C_USE_REORDER_INSTR = 1).
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