EasyManuals Logo

Xilinx ZCU106 User Manual

Xilinx ZCU106
152 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #96 background imageLoading...
Page #96 background image
ZCU106 Board User Guide 96
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
Table 3-38: GTH Transceiver Bank 224 Interface Connections
XCZU7EV
(U1) Pin
XCZU7EV Pin
Name
Schematic Net Name
(2)
Connected To
Pin No. Pin Name Device
AH4 MGTHTXP0 PCIE_TX3_P
(1)
A29 PERp3
PCIe 4-lane edge
connector P3
AH3 MGTHTXN0 PCIE_TX3_N
(1)
A30 PERn3
AJ2 MGTHTXP1 PCIE_RX3_P B27 PETp3
AJ1 MGTHTXN1 PCIE_RX3_N B28 PETn3
AG6 MGTHTXP2 PCIE_TX2_P
(1)
A25 PERp2
AG5 MGTHTXN2 PCIE_TX2_N
(1)
A26 PERn2
AG2 MGTHRXP0 PCIE_RX2_P B23 PETp2
AG1 MGTHRXN0 PCIE_RX2_N B24 PETn2
AE6 MGTHRXP1 PCIE_TX1_P
(1)
A21 PERp1
AE5 MGTHRXN1 PCIE_TX1_N
(1)
A22 PERn1
AF4 MGTHRXP2 PCIE_RX1_P B19 PETp1
AF3 MGTHRXN2 PCIE_RX1_N B20 PETn1
AD4 MGTHTXP3 PCIE_TX0_P
(1)
A16 PERp0
AD3 MGTHTXN3 PCIE_TX0_N
(1)
A17 PERn0
AE2 MGTHRXP3 PCIE_RX0_P B14 PETp0
AE1 MGTHRXN3 PCIE_RX0_N B15 PETn0
AB8 MGTREFCLK0P PCIE_CLK_P
(1)
A13 REFCLK+
AB7 MGTREFCLK0N PCIE_CLK_N
(1)
A14 REFCLK-
AA10 MGTREFCLK1P USER_SMA_MGT_CLOCK_C_P 1SIG SMA J79
AA9 MGTREFCLK1N USER_SMA_MGT_CLOCK_C_N 1SIG SMA J80
Notes:
1. Series capacitor coupled.
2. MGT connections I/O standard not applicable.
Send Feedback

Table of Contents

Other manuals for Xilinx ZCU106

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Xilinx ZCU106 and is the answer not in the manual?

Xilinx ZCU106 Specifications

General IconGeneral
BrandXilinx
ModelZCU106
CategoryMotherboard
LanguageEnglish

Related product manuals