ZCU106 Board User Guide 99
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
Table 3-41: GTH Transceiver Bank 227 Interface Connections
XCZU7EV
(U1) Pin
XCZU7EV Pin
Name
Schematic Net Name
(2)
Connected To
Pin No. Pin Name Device
M4 MGTHTXP0 FMC_HPC0_DP6_C2M_P B36 DP6_C2M_P
FMC HPC0 J5
M3 MGTHTXN0 FMC_HPC0_DP6_C2M_N B37 DP6_C2M_N
N2 MGTHRXP0 FMC_HPC0_DP6_M2C_P B16 DP6_M2C_P
N1 MGTHRXN0 FMC_HPC0_DP6_M2C_N B17 DP6_M2C_N
L6 MGTHTXP1 FMC_HPC0_DP5_C2M_P A38 DP5_C2M_P
L5 MGTHTXN1 FMC_HPC0_DP5_C2M_N A39 DP5_C2M_N
L2 MGTHRXP1 FMC_HPC0_DP5_M2C_P A18 DP5_M2C_P
L1 MGTHRXN1 FMC_HPC0_DP5_M2C_N A19 DP5_M2C_N
K4 MGTHTXP2 FMC_HPC0_DP7_C2M_P B32 DP7_C2M_P
K3 MGTHTXN2 FMC_HPC0_DP7_C2M_N B33 DP7_C2M_N
J2 MGTHRXP2 FMC_HPC0_DP7_M2C_P B12 DP7_M2C_P
J1 MGTHRXN2 FMC_HPC0_DP7_M2C_N B13 DP7_M2C_N
H4 MGTHTXP3 FMC_HPC0_DP4_C2M_P A34 DP4_C2M_P
H3 MGTHTXN3 FMC_HPC0_DP4_C2M_N A35 DP4_C2M_N
G2 MGTHRXP3 FMC_HPC0_DP4_M2C_P A14 DP4_M2C_P
G1 MGTHRXN3 FMC_HPC0_DP4_M2C_N A15 DP4_M2C_N
T8 MGTREFCLK0P FMC_HPC0_GBTCLK1_M2C_C_P
(1)
B20 GBTCLK1_M2C_P
T7 MGTREFCLK0N FMC_HPC0_GBTCLK1_M2C_C_N
(1)
B21 GBTCLK1_M2C_N
R10 MGTREFCLK1P USER_MGT_SI570_CLOCK2_C_P
(1)
13 Q2_P
SI53340 U51
1-to-2 buffer
R9 MGTREFCLK1N USER_MGT_SI570_CLOCK2_C_N
(1)
14 Q2_N
Notes:
1. Series capacitor coupled.
2. MGT connections I/O standard not applicable.
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