Xilinx ZCU106 User Manual

ZCU106 Board User Guide 98
UG1244 (v1.0) March 28, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
Table 3-40: GTH Transceiver Bank 226 Interface Connections
XCZU7EV
(U1) Pin
XCZU7EV Pin
Name
Schematic Net Name
(2)
Connected To
Pin No. Pin Name Device
U6 MGTHTXP0 FMC_HPC0_DP3_C2M_P A30 DP3_C2M_P
FMC HPC0 J5
U5 MGTHTXN0 FMC_HPC0_DP3_C2M_N A31 DP3_C2M_N
V4 MGTHRXP0 FMC_HPC0_DP3_M2C_P A10 DP3_M2C_P
V3 MGTHRXN0 FMC_HPC0_DP3_M2C_N A11 DP3_M2C_N
T4 MGTHTXP1 FMC_HPC0_DP1_C2M_P A22 DP1_C2M_P
T3 MGTHTXN1 FMC_HPC0_DP1_C2M_N A23 DP1_C2M_N
U2 MGTHRXP1 FMC_HPC0_DP1_M2C_P A2 DP1_M2C_P
U1 MGTHRXN1 FMC_HPC0_DP1_M2C_N A3 DP1_M2C_N
R6 MGTHTXP2 FMC_HPC0_DP0_C2M_P C2 DP0_C2M_P
R5 MGTHTXN2 FMC_HPC0_DP0_C2M_N C3 DP0_C2M_N
R2 MGTHRXP2 FMC_HPC0_DP0_M2C_P C6 DP0_M2C_P
R1 MGTHRXN2 FMC_HPC0_DP0_M2C_N C7 DP0_M2C_N
N6 MGTHTXP3 FMC_HPC0_DP2_C2M_P A26 DP2_C2M_P
N5 MGTHTXN3 FMC_HPC0_DP2_C2M_N A27 DP2_C2M_N
P4 MGTHRXP3 FMC_HPC0_DP2_M2C_P A6 DP2_M2C_P
P3 MGTHRXN3 FMC_HPC0_DP2_M2C_N A7 DP2_M2C_N
V8 MGTREFCLK0P FMC_HPC0_GBTCLK0_M2C_C_P
(1)
D4 GBTCLK0_M2C_P
V7 MGTREFCLK0N FMC_HPC0_GBTCLK0_M2C_C_N
(1)
D5 GBTCLK0_M2C_N
U10 MGTREFCLK1P USER_MGT_SI570_CLOCK1_C_P
(1)
11 Q1_P
SI53340 U51
1-to-2 buffer
U9 MGTREFCLK1N USER_MGT_SI570_CLOCK1_C_N
(1)
12 Q1_N
Notes:
1. Series capacitor coupled.
2. MGT connections I/O standard not applicable.
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Xilinx ZCU106 Specifications

General

Brand	Xilinx
Model	ZCU106
Category	Motherboard
Language	English