MC97F6108A User’s manual 18. Reset
18.7 Register description for reset operation
RSFR (Reset Source Flag Register): 86H
Power-On Reset flag bit. The bit is reset by writing ‘0’ to this bit.
External Reset (RESETB) flag bit. The bit is reset by writing ‘0’ to this bit
or by Power-On Reset.
Watch Dog Reset flag bit. The bit is reset by writing ‘0’ to this bit or by
Power-On Reset.
On-chip debugger reset flag bit. The bit reset by writing ‘0’ to this bit or by
Power-On Reset
Brown-Out Reset & Interrupt flag bit. The bit is reset by writing ‘0’ to this
bit or by Power-on Reset or by BOD acknowledge signal.
NOTES:
1. When the Power-on Reset occurs, the PORF and BODRF bits are only set to “1”,
the other flag (WDTRF) bits are all cleared to “0”.
2. When the Power-on Reset occurs, the EXTRF bit is unknown, at that time, the
EXTRF bit can be set to “1” when the external Reset (RESETB) occurs.
3. When a reset except the POR occurs, the corresponding flag bit is only set to “1”,
the other flag bits are kept in the previous values.
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