Abov MC97F6108A User Manual

MC97F6108A User’s manual 6. Interrupt controller
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6.6 Effective timing after controlling interrupt bit
Case A in Figure 16 shows the effective time after controlling Interrupt Enable Registers (IE, IE1, IE2,
and IE3).
Figure 16. Effective Timing of Interrupt Enable Register
Case B in Figure 17 shows the effective time after controlling Interrupt Flag Registers.
Figure 17. Effective Timing of Interrupt Flag Register
Interrupt Enable Register
command
Next Instruction
Next Instruction
After executing IE set/clear,
enable register is effective.
Interrupt Flag Register
Command
Next Instruction
Next Instruction
After executing next instruction,
interrupt flag result is effective.

Abov MC97F6108A Specifications

General

Brand	Abov
Model	MC97F6108A
Category	Microcontrollers
Language	English