MC97F6108A User’s manual 5. I/O ports
P0DB (P0 De-bounce Enable Register): 2F02H
Configure De-bounce of P0 Port
NOTE: Debounce time of each ports are 1/2/4/8us
NOTES:
1. If the same level is not detected on enabled pin three or four times in a row at
the sampling clock, the signal is eliminated as noise.
2. A pulse level should be input for the duration of 3 clock or more to be actually
detected as a valid edge.
3. The port de-bounce is automatically disabled at stop mode and recovered after
stop mode release.
PSR0 (Port De-bounce Selection Register): 2F48H
External Reset De-bounce Selection Register
Port De-bounce Selection Register