Analog Devices AD9361

AD9361 Reference Manual UG-570
| Page 95 of 128
Figure 65. Receiver Data Path, Single Port TDD (DNC = Do Not Care)
DATA _CLK
RX _FRAME
P0_D[11:0]
P1_D[11:0]
DATA _CLK
RX _FRAME
P0_D[11:0]
P1_D[11:0]
DNC DNC
DNC DNC
DNC DNC
DATA _CLK
RX _FRAME
P0_D[11:0]
P1_D[11:0]
DATA _CLK
RX _FRAME
P0_D[11:0]
P1_D[11:0]
DATA _CLK
RX _FRAME
P0_D[11:0]
P1_D[11:0]
R1_I[11:0]
R1_Q[11:0] R2_I[11:0]
R2_Q[11:0]
R1_I[11:0]
R1_Q[11:0] R2_I[11:0]
R2_Q[11:0]
R1_I[11:0]
R1_Q[11:0] R2_I[11:0]
R2_Q[11:0]
2R2T, DDR, TDD, SINGLE PORT, 0x010 = 0xC8, 0x011 = 0x00, 0x012 = 0x0C
2R2T, DDR, TDD, SINGLE PORT, 0x010 = 0xC8, 0x011 = 0x00, 0x012 = 0x0C
R1_I[11:0]
R1_Q[11:0]
R1_I[11:0]
R1_Q[11:0]
R1_I[11:0]
R1_Q[11:0]
DNC DNC
DNC DNC
DNC DNC
R1_I[11:0]
R1_Q[11:0]
R1_I[11:0]
R1_Q[11:0]
R1_I[11:0]
R1_Q[11:0]
R1_I[11:0] R1_Q[11:0] R1_I[11:0] R1_Q[11:0] R1_I[11:0] R1_Q[11:0]
R1_I[11:0] R1_Q[11:0] R1_I[11:0] R1_Q[11:0] R1_I[11:0] R1_Q[11:0]
1R2T, DDR, TDD, SINGLE PORT, 0x010 = 0xC8, 0x011 = 0x00, 0x012 = 0x0C
1R1T, DDR, TDD, SINGLE PORT, 0x010 = 0xC8, 0x011 = 0x00, 0x012 = 0x0C
1R1T, DDR, TDD, SINGLE PORT, 0x010 = 0xC8, 0x011 = 0x00, 0x012 = 0x2C
11668-066
Rev. A