Analog Devices AD9361 User Manual

UG-570 AD9361 Reference Manual
| Page 96 of 128
Fig
ure 66. Transmitter Data Path, Single Port TDD (DNC = Do Not Care)
TX _FRAME
P0_D[11:0]
P1_D[11:0]
TX _FRAME
P0_D[11:0]
P1_D[11:0]
DNC DNC
DNC DNC
DNC DNC
TX _FRAME
P0_D[11:0]
P1_D[11:0]
TX _FRAME
P0_D[11:0]
P1_D[11:0]
FB_CLK
TX _FRAME
P0_D[11:0]
P1_D[11:0]
T1_I[11:0]
T1_Q[11:0] T2_I[11:0]
T2_Q[11:0]
T1_I[11:0]
T1_Q[11:0] T2_I[11:0]
T2_Q[11:0]
T1_I[11:0]
T1_Q[11:0] T2_I[11:0]
T2_Q[11:0]
2R2T, DDR, TDD, SINGLE PORT, 0x010 = 0xC8, 0x011 = 0x00, 0x012 = 0x0C
2R2T, DDR, TDD, SINGLE PORT, 0x010 = 0xC8, 0x011 = 0x00, 0x012 = 0x0C
T1_I[11:0]
T1_Q[11:0]
T1_I[11:0]
T1_Q[11:0]
T1_I[11:0]
T1_Q[11:0]
DNC DNC
DNC DNC
DNC DNC
T1_I[11:0]
T1_Q[11:0]
T1_I[11:0]
T1_Q[11:0]
T1_I[11:0]
T1_Q[11:0]
T1_I[11:0] T1_Q[11:0] T1_I[11:0] T1_Q[11:0] T1_I[11:0] T1_Q[11:0]
T1_I[11:0] T1_Q[11:0] T1_I[11:0] T1_Q[11:0] T1_I[11:0] T1_Q[11:0]
1R2T, DDR, TDD, SINGLE PORT, 0x010 = 0xC8, 0x011 = 0x00, 0x012 = 0x0C
1R1T, DDR, TDD, SINGLE PORT, 0x010 = 0xC8, 0x011 = 0x00, 0x012 = 0x0C
1R1T, DDR, TDD, SINGLE PORT, 0x010 = 0xC8, 0x011 = 0x00, 0x012 = 0x2C
11668-067
FB_CLK
FB_CLK
FB_CLK
0
0
0
0
0
FB_CLK
0
0
0
0
0
Rev. A

Analog Devices AD9361 Specifications

General

Brand	Analog Devices
Model	AD9361
Category	Motherboard
Language	English