ARM Cortex-A9 MBIST

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Table 3-11 CacheSize field encoding ....................................................................................... 3-13

Table A-1 MBIST controller interface signals ............................................................................ A-2

Table A-2 MBISTARRAY one-hot chip enables ........................................................................ A-2

Table A-3 Miscellaneous signals ............................................................................................... A-4

Table B-1 Differences between issue A and issue B ................................................................ B-1

Table B-2 Differences between issue B and issue C ................................................................ B-1

ARM Cortex-A9 MBIST - Page 8