Emerson DSM314 User Manual

User Manual Chapter 1
GFK-1742F Jan 2020
Product Overview 5
Host Controller Data Latency and DSM314 Latencies
The DSM314 is an intelligent module operating asynchronously to the CPU module. Data is
exchanged between the CPU and the DSM314 automatically. For information about the
operation of the CPU sweep refer to the following:
•
Series 90-30 PLC CPU Instruction Set Reference Manual, GFK-0467M or later
•
PACSystems CPU Reference Manual, GFK-2222
Host Controller to DSM Data Transfers
•
Host controller-based functions may retrieve DSM status (%I and %AI) information
from the DSM data memory asynchronously. The DSM internally refreshes all status
data except Actual Velocity at the position loop rate (once every 0.5 to 2ms). Actual
Velocity is updated in the DSM data memory every 128 milliseconds. The DSM
performs averaging to generate an accurate Actual Velocity reading; therefore, the
Actual Velocity reading is not intended for high-speed control purposes.
•
The host controller requires approximately 2-4 milliseconds back-plane overhead
when reading data (%I and %AI) from and writing data (%Q and %AQ) to DSM internal
memory if the DSM is in the CPU rack. The host controller normally reads input data
from and writes output data to the DSM once per host controller sweep. In the worst
case, the DSM internal data update (which takes 0.5 to 2ms to occur) occurs just
after the host controller scan’s input update. In this case, the host controller does
not read DSM data again until its next scan and any changes in DSM data will be
available in the host controller either 4-6ms later or approximately one host
controller sweep later, whichever is larger.
•
The configuration software automatically selects the lengths of %AI and %AQ data
based upon the number of axes configured. A host controller CPU requires time to
read and write the data across the backplane with the DSM314. The following
manuals document the host controller sweep impact:
— Series 90-30 PLC Instruction Set Reference Manual, GFK-0467M or later.
— PACSystems CPU Reference Manual, GFK-2222B or later.
Also refer to the Important Product Information sheet that comes packaged with
the DSM module.
•
Host controller commands to the DSM (%Q, %AQ) are output to the DSM at the end
of the logic solving sweep. The DSM processes the commands within 4 milliseconds
after receipt.
Motion Program/CTL Faceplate Inputs
•
Delays associated with motion program control or branching via faceplate CTL
inputs are equal to a position loop update time interval (0.5 to 2ms) plus the input
filter delay (5ms typical for 24 volt CTL inputs or 10 µs for 5 volt CTL inputs). See
tables 1, 2, and 3 for position loop update times.

Emerson DSM314 Specifications

General

Brand	Emerson
Model	DSM314
Category	Controller
Language	English