Fuji Electric Faldic-a RYS-R Series - 5.2.4 Alarm detection [ALM]

5-4
MHT260a (Engl.)
■ Related item
Resetting method of the alarm detection is as listed below:
1) At the ON edge of [RST] signal of control input signal
2) ENT key operation in the test running mode [
]
3) Press ∧ key and ∨ key simultaneously (longer than 1 [s]) at alarm detection [
].
4) Press ∧ key and ∨ key simultaneously (longer than 1 [s]) at alarm history [
].
5) Turn power off and turn on again
To initialize the history [
] of alarm detection, press ENT key in the test running mode.
5.2.4 Alarm detection [ALM]
This signal is turned on, when the amplifier protective function is activated (detects an alarm).
Alarm detection [ALM] (Control output signal)
■ Function
This signal is on when amplifier detects alarm, and retained by amplifier. The signal is turned off at the ON edge of alarm reset [RST] signal
after the cause of alarm is removed (Motor running is enable).
Alarm or no alarm can be recognized, when the host controller receives the on/off status of the [ALM] signal. This also can be recognized
whether the ready [RDY] signal is off when the run command [RUN] is on.
■ Parameter setting
To allocate the [ALM] signal to the control output terminal, set (16) to the system para..
■ Related item
The contents of alarm detection can also be outputted to the control output terminals by alarm code.
Alarm code 4 [ALM4] (36) Alarm code 3 [ALM3] (35)
Alarm code 2 [ALM2] (34) Alarm code 1 [ALM1] (33)
Alarm code 0 [ALM0] (32)
For SX bus type (SX bus direct connection), alarm code is outputted at +5 word position of IQ area.
For T-link type (T-link direct connection), alarm code is outputted at +1 word position of WB area.
K80791234
K80791234K80791234
K80791234
L1
L1L1
L1
L2
L2L2
L2
L3
L3L3
L3
DB
DBDB
DB
P1
P1P1
P1
N
NN
N
P+
P+P+
P+
U
UU
U
V
VV
V
W
WW
W
CHARGE
CHARGECHARGE
CHARGE
FALDIC
FALDICFALDIC
FALDIC
SHIFT
SHIFTSHIFT
SHIFT
ENT
ENTENT
ENT
RYS201S3-VVS
RYS201S3-VVSRYS201S3-VVS
RYS201S3-VVS
MODE
MODEMODE
MODE
ESC
ESCESC
ESC
K80791234
K80791234K80791234
K80791234
L1
L1L1
L1
L2
L2L2
L2
L3
L3L3
L3
DB
DBDB
DB
P1
P1P1
P1
N
NN
N
P+
P+P+
P+
U
UU
U
V
VV
V
W
WW
W
CHARGE
CHARGECHARGE
CHARGE
FALDIC
FALDICFALDIC
FALDIC
SHIFT
SHIFTSHIFT
SHIFT
ENT
ENTENT
ENT
RYS201S3-LPS
RYS201S3-LPSRYS201S3-LPS
RYS201S3-LPS
MODE
MODEMODE
MODE
ESC
ESCESC
ESC
APS30
APS30APS30
APS30
PWR
PWRPWR
PWR
ALM
ALMALM
ALM
ＳＸ
ＳＸＳＸ
ＳＸ
SCPU32
SCPU32SCPU32
SCPU32
LOADER
LOADERLOADER
LOADER
RUN
RUNRUN
RUN
TERM
TERMTERM
TERM
SLV
SLVSLV
SLV
STOP
STOPSTOP
STOP
CPU
CPUCPU
CPU
No.
No.No.
No.
ONL
ONLONL
ONL
ERR
ERRERR
ERR
RUN
RUNRUN
RUN
ALM
ALMALM
ALM
BAT
BATBAT
BAT
ONL01234567
ONL01234567ONL01234567
ONL01234567
ERR89101112131415
ERR89101112131415ERR89101112131415
ERR89101112131415
ONLCH1
ONLCH1ONLCH1
ONLCH1
ERRCH2
ERRCH2ERRCH2
ERRCH2
EMG+OT‑OT
EMG+OT‑OTEMG+OT‑OT
EMG+OT‑OT
20
2020
20
1
11
1
B/A
B/AB/A
B/A
HP2
HP2HP2
HP2
ONL
ONLONL
ONL
ERR
ERRERR
ERR
PE1
PE1PE1
PE1
PH
PHPH
PH
PL
PLPL
PL
DA
DADA
DA
CH
CHCH
CH
No.
No.No.
No.
SCPU32
SCPU32SCPU32
SCPU32
LOADER
LOADERLOADER
LOADER
RUN
RUNRUN
RUN
TERM
TERMTERM
TERM
SLV
SLVSLV
SLV
STOP
STOPSTOP
STOP
CPU
CPUCPU
CPU
No.
No.No.
No.
ONL
ONLONL
ONL
ERR
ERRERR
ERR
RUN
RUNRUN
RUN
ALM
ALMALM
ALM
BAT
BATBAT
BAT
ONL01234567
ONL01234567ONL01234567
ONL01234567
ERR89101112131415
ERR89101112131415ERR89101112131415
ERR89101112131415
Alarm detection [ALM]