Digital Control Register
Bit
Data Definition
7 3
1/2"
motor
control, active high turn on
motor
Most significant bit in rate select code
of
PLL
o
Least
significant bit in rate select code
of
PLL
Bit Data
o
kHz
o 0 500
o 1 300
1 0 250
Foe
Status Register
Bit
Data Definition
7 Request
for
master(RQM) indicates data register
is
ready
to
send
or
receive data
to
or from the 80286.
6
o
Data Input/Output (DID). Data transfer from the
data register
of
the
FDC
to
the 80286.
Data transfer from the 80286
to
the data register
of
the
FDC.
5
Disc
controller
is
in
non-DMA mode (NDM).
4
Disc
controller
is
busy
(CB)
read/write being
executed.
3-2
Reserved
Disc
drive B busy
(DBB)
in
seek
mode.
o
Disc
drive A
Busy
(DBA)
in
seek mode.
48
Processor
Boa
rd
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