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Intel M50CYP1UR Series User Manual

Intel M50CYP1UR Series
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Intel® Server System M50CYP1UR Family System Integration and Service Guide
115
Error
Severity
System Action when BIOS Detects the Error Condition
Processor
frequency (speed)
not identical
Fatal
If the frequencies for all processors can be adjusted to be the same:
Adjusts all processor frequencies to the highest common frequency.
Does not generate an error this is not an error condition.
Continues to boot the system successfully.
If the frequencies for all processors cannot be adjusted to be the same:
Logs the POST error code into the SEL.
Alerts the BMC to set the system status LED to steady amber.
Does not disable the processor.
Displays 0197: Processor speeds unable to synchronize message in the error
manager.
Takes fatal error action (see above) and does not boot until the fault condition is remedied
Processor
Intel® UPI link
frequencies not
identical
Fatal
If the link frequencies for all Intel® Ultra Path Interconnect (Intel® UPI) links can be adjusted to be
the same:
Adjusts all Intel® UPI interconnect link frequencies to highest common frequency.
Does not generate an error this is not an error condition.
Continues to boot the system successfully.
If the link frequencies for all Intel® UPI links cannot be adjusted to be the same:
Logs the POST error code into the SEL.
Alerts the BMC to set the system status LED to steady amber.
Does not disable the processor.
Displays 0195: Processor Intel® UPII link frequencies unable to
synchronize message in the error manager.
Takes fatal error action (see above) and does not boot until the fault condition is remedied.
Processor
microcode update
failed
Major
Logs the POST error code into the SEL.
Displays 816x: Processor 0x unable to apply microcode update message in
the error manager or on the screen.
Takes major error action. The system may continue to boot in a degraded state, depending
on the “POST Error Pause” setting in setup, or may halt with the POST error code in the
error manager waiting for operator intervention.
Processor
microcode update
missing
Minor
Logs the POST error code into the SEL.
Displays 818x: Processor 0x microcode update not found message in the error
manager or on the screen.
The system continues to boot in a degraded state, regardless of the “POST Error Pause”
setting in setup.

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Intel M50CYP1UR Series Specifications

General IconGeneral
BrandIntel
ModelM50CYP1UR Series
CategoryServer
LanguageEnglish

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