EasyManuals Logo

Intel SC5299BRP User Manual

Intel SC5299BRP
154 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #114 background imageLoading...
Page #114 background image
Intel
®
Entry Server Chassis SC5299-E TPS Power Sub-system
Revision 3.1
Intel order number D37594-005
99
2.5.8.14 Timing Requirements
The timing requirements for power supply operation are as follows. The output voltages must
rise from 10% to within regulation limits (T
vout_rise
) within 5 to 70 ms, except for 5VSB, which is
allowed to rise from 1.0 to 25 ms. The +3.3V, +5V and +12V output voltages should start to rise
approximately at the same time. All outputs must rise monotonically. Each output voltage shall
reach regulation within 50ms (T
vout_on
) of each other during turn on of the power supply. Each
output voltage shall fall out of regulation within 400msec (T
vout_off
) of each other during turn off.
The following table shows the timing requirements for the power supply being turned on and off
via the AC input, with PSON held low and the PSON signal, with the AC input applied.
Table 123. Output Voltage Timing
Item Description MIN MAX Units
T
vout_rise
Output voltage rise time from each main output. 5.0
1
70
1
msec
T
vout_on
All main outputs must be within regulation of each
other within this time.
50 msec
T
vout_off
All main outputs must leave regulation within this
time.
400 msec
1. The 5VSB output voltage rise time shall be from 1.0 ms to 25 ms.
TP02313
V out
V1
V2
V3
V4
T
vout_on
T
vout_rise
10% V out
T
vout_off
Figure 19. Output Voltage Timing

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Intel SC5299BRP and is the answer not in the manual?

Intel SC5299BRP Specifications

General IconGeneral
BrandIntel
ModelSC5299BRP
CategoryChassis
LanguageEnglish

Related product manuals