Intel SC5299BRP

Intel
®
Entry Server Chassis SC5299-E TPS Power Sub-system
Revision 3.1
Intel order number D37594-005
73
TP02313
V out
V1
V2
V3
V4
T
vout_on
T
vout_rise
10% V out
T
vout_off
Figure 15. Output Voltage Timing
Table 90. Turn On/Off Timing
Item Description Loading Minimum Maximum Units
T
sb_on_delay
Delay from AC being applied to 5VSB being within
regulation.
1500
ms
T
ac_on_delay
Delay from AC being applied to all output voltages
being within regulation.
2500
ms
T
vout_holdup
Time all output voltages stay within regulation after
loss of AC.
60%
21
ms
T
pwok_holdup
Delay from loss of AC to de-assertion of PWOK 60% 20 ms
T
pson_on_delay
Delay from PSON
#
active to output voltages within
regulation limits.
5 400
ms
T
pson_pwok
Delay from PSON
#
deactive to PWOK being de-
asserted.
50
ms
T
pwok_on
Delay from output voltages within regulation limits to
PWOK asserted at turn on.
100 500
ms