Intel SC5299BRP User Manual

Power Sub-system Intel
®
Entry Server Chassis SC5299-E TPS
Revision 3.1
Intel order number D37594-005
40
TP02313
V out
V1
V2
V3
V4
T
vout_on
T
vout_rise
10% V out
T
vout_off
Figure 11. Output Voltage Timing
Table 45. Turn On/Off Timing
Item Description Minimum Maximum Units
T
sb_on_delay
Delay from AC being applied to 5VSB being within
regulation.
1500
msec
T
ac_on_delay
Delay from AC being applied to all output voltages being
within regulation.
2500
msec
T
vout_holdup
Time all output voltages stay within regulation after loss of
AC.
21
msec
T
pwok_holdup
Delay from loss of AC to de-assertion of PWOK 20 msec
T
pson_on_delay
Delay from PSON
#
active to output voltages within regulation
limits.
5 400
msec
T
pson_pwok
Delay from PSON
#
deactive to PWOK being de-asserted. 50 msec
T
pwok_on
Delay from output voltages within regulation limits to PWOK
asserted at turn on.
100 500
msec
T
pwok_off
Delay from PWOK de-asserted to output voltages (3.3V, 5V,
12V, -12V) dropping out of regulation limits.
1
msec
T
pwok_low
Duration of PWOK being in the de-asserted state during an
off/on cycle using AC or the PSON signal.
100
msec

Intel SC5299BRP Specifications

General

Brand	Intel
Model	SC5299BRP
Category	Chassis
Language	English