Mitsubishi Electric MELSEC-Q/L - Multiplication and Division of Floating-Point Data (Single Precision)

252
6 BASIC INSTRUCTIONS
6.2 Arithmetic Operation Instructions
Multiplication and division of floating-point data (single
precision)
E*(P), E/(P)
*1 Applicable for the Universal model QCPU, LCPU.
Processing details
■E*
• Multiplies the 32-bit floating decimal point real number designated by (S1) by the 32-bit floating decimal point real number
designated by (S2) and stores the operation result at the device designated by (D).
• Values which can be designated at (S1), (S2) and (D) and which can be stored, are as follows:
0, 2
-126
 | Designated value (stored value) | < 2
128
• When an input value is set using a programming tool, a rounding error may occur. For precautions, refer to Page 89
Precautions.
■E/
• Divides the 32-bit floating decimal point real number designated by (S1) by the 32-bit floating decimal point real number
designated by (S2) and stores the operation result at the device designated by (D).
• Values which can be designated at (S1), (S2) and (D) and which can be stored, are as follows:
0, 2
-126
 | Designated value (stored value) | < 2
128
• When an input value is set using a programming tool, a rounding error may occur. For precautions, refer to Page 89
Precautions.
• Basic model QCPU: The serial number (first five digits) is "04122" or later.
(S1): Data to be multiplied/divided or head number of the devices where the data to be multiplied/divided is stored (real number)
(S2): Data for multiplying/dividing or head number of the devices where the data for multiplying/dividing is stored (real number)
(D): Head number of the devices where the operation result will be stored (real number)
Setting
data
Internal device R, ZR J\ U\G Zn Constant
E
Others
Bit Word Bit Word
(S1)   
*1

(S2)   
*1

(D)   
*1

Basic
Process
High
performance
Redundant Universal LCPU
Ver.
E* , E/
E* P, E/P
Command
Command
P
S1 S2
S1 S2
D
D
, E/indicates an instruction symbol of E* .
+1
32-bit floating-point
real number
+1
32-bit floating-point
real number
+1
32-bit floating-point
real number
S1 S2
D
S1 S2
D
+1
/
+1
32-bit floating-point
real number
+1
32-bit floating-point
real number
S1 S2
D
S1 S2
D
32-bit floating-point
real number